Frequently Asked Questions
Q: How does Nitronex determine reliability of its parts?
A: Nitronex performs extensive reliability testing on all products prior to production release. A cross-functional team meets to outline the qualification plan for a product and then the reliability engineers execute to the plan. Long-term drift is characterized through 3-temp DC life-testing, DC-HTOL, and RF-HTOL testing. To date ~500,000 hours of DC-HTOL have been collected on Nitronex devices. Furthermore the robustness of the technology is examined through such tests as ESD and VSWR mismatch tests. Finally, mechanical aspects of a product are tested via autoclave, temperature cycling, and bond pull to name a few. Complete details of our NRF1 process qualification can be found here.
Q: How good is Nitronex’s reliability?
A: While different test
methodologies and forms of reporting data make direct comparisons difficult,
Nitronex believes its reliability is on par with existing technologies
such as Si-LDMOS and GaAs pHEMTs. Some common
metrics are MTTF (mean-time-to-failure). In this case Nitronex shows
a MTTF >10 million hours at an operating temperature of 150°C and a
drain voltage of 28V. Another metric is drift over 20 years of operating
life. Here Nitronex has demonstrated <6% drift in Imax when operated
at 200°C and 28V. Finally the robustness has been demonstrated with
ESD results showing HBM ratings >1000V for the NPT35050 device and the
ability to survive VSWR mismatches as high as 20:1.
Q: What makes Nitronex’s GaN-on-Si so reliable?
A: Nitronex’s GaN process has
several components that make it inherently reliable. Nitronex uses a robust
Au metallization scheme which is much less susceptible to eletromigration
than the Al used in Si devices. GaN devices make use of a Schottky gate structure
which eliminates the gate oxide that commonly plagues Si devices. Nitronex’s GaN process is
able to leverage several aspects from mature GaAs fabrication procedures. Finally,
Nitronex’s extensive development of optimized expitaxial structures with
emphasis on reducing stress and producing intrinsic buffers mitigates many
of the problems seen by GaN-on-SiC competitors.
Q: What is the activation energy for Nitronex’s NRF1 process and is it valid
at lower temperatures?
A: A 3-tempature DC life-test
is used to determine the activation energy for the process. In this
test, devices were stressed at junction temperatures of 260, 285, and 310°C. A
failure criteria of 15% drift in in-situ drain current was applied. Data
was fit to a cumulative failure plot showing a lognormal distribution. Finally
the MTTFs (mean-time-to-failures) for each group were plotted on an Arrhenius
plot and revealed activation energy of 2.0eV. For
more details...
While the fit is excellent in the 260-310°C range, Nitronex is aware that
another activation energy can exist at lower temperatures. In order
to determine if this is the case, acceleration equations have been applied
using 2.0eV to predict drift at temperature of 215, 200, and 150°C and show
accurate ability to predict drift with this constant activation energy
Q: How does Nitronex determine junction temperature and thermal resistance?
A: Nitronex uses a Quantum Focus InfraScopeII to perform infrared thermal
imaging. This tool uses pixel-by-pixel emissivity compensation to
accurately measure temperature with a ~2.5µm spatial resolution. In
addition to these measurements Nitronex performs full 3D FEM (finite element
modeling) on all its devices and compares these results with the simulations. The
combination of these two tools allows for accurate junction temperature
determination.
Q: Is there an inherent disadvantage of Si compared to SiC substrates?
A: SiC is a better thermally conductive substrate but due to substrate cost
and yields, SiC based GaN vendors typically use smaller devices that offset
the substrate advantages.